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Rail Surface Inspection

Critical Asset Detection Algorithms

The following algorithms were developed for a major national railroad to automatically detect numerous fixtures and hardware components that are considered critical assets by the federal rail administration.  For this approach, a video camera and GPS/IMU system were located on the back of a locomotive to passively capture the track and surrounding environment while the locomotive was in motion. 

 

The following asset detection algorithms were developed by Anthony to support this project.

Turnout Detection

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Turnouts are the locations where the railroad splits from a single ​set of tracks to multiple.  Turnout detection automatically detects and catalogs the locations of turnouts.

Graded Crossing Detection

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Graded crossings are any locations where a road, sidewalk, or pathway crosses the track surface.  These crossings can range from narrow footpaths, to large highway crossings and have vastly different appearances.

Control Signal Detection

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Control signals can indicate the direction, clearance, and allowed speed of a train through a junction.  These can have a large variety of appearances including dwarf, pole-mount, cantilevered, and bridge mounted configurations.

Clearance Point Detection

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Clearance points indicate the closest point to a turnout that two standard-size locomotives can pass by each other without colliding.  These can be indicated by rail side indicators as wells as by hardware derailer systems.

Signage Detection

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Critical asset signage includes a number of different sign types and classes, including: Mileposts, station signs, speed signs, etc.

Derail Detection

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Hardware derailers are located along track surfaces to intentionally derail a train in the event of unauthorized train movement or rolling stock.  These devices come in a large number of configurations are are often indicated by track-side signage.

Processing Engine

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The background machine vision processing engine used to process this train data distributes the workload across numerous processing cores to provide large scale processing capability.

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